; ----------------------------------------
; MAIN PROGRAM                            
; ----------------------------------------
         ORG      $7000       ; User RAM at $7000
         BSR      INIT        ; Branch to INIT for initialization
         BSR      CONVERT     ; Branch to CONVERT for conversion
DONE     BRA      DONE        ; Branch to self

;  ----------------------------------------
;  Subroutine INIT: Initialize ATD        ;  
;  ----------------------------------------

INIT   LDAA    #$80      ; config word to turn on ADPU,
       STAA    ATDCTL2   ; flags clr normal, disable interrupts
       BSR     DELAY     ; branch to subroutine DELAY
       LDAA    #$00      ; select continue conversions in
       STAA    ATDCTL3   ; active background mode
       LDAA    #$01      ; select final sample time = 2 ATD clocks,
       STAA    ATDCTL4   ; prescalar = 4 (PRS4:0 = 1)
       RTS 

; ----------------------------------------
; Subroutine CONVERT                     ;
; ----------------------------------------
; Set-up ATD, make single conversion and store the result to a memory location
; Configure and start ATD conversion
; Analog input signal on PAD6
; Convert: using single channel, non-continuous mode
; The result will be located in ADR2H
CONVERT LDAA      #$06      ; ATD SCAN=0, MULT=0, PAD6
                            ; write clears flag
        STAA      ATDCTL5   ; 4 conversions on single sequence
WTCNV  BRCLR      ATDSTAT2,$40,WTCNV  ; wait Seq Comp Flag
        LDD       ADR2H    ; Loads result (ADR2H) to ACC D
        RTS

; ----------------------------------------
; Subroutine DELAY: delays 100 uS        ; 
; ----------------------------------------         
DELAY  LDAA      #$C8      ; load accumulator with 100 uS delay
LOOP   DECA                ; Decrement ACC
       BNE       LOOP      ; Branch if not equal to zero
       RTS